Decoupling Requirements for the DS1077/DS1085 EconOscillators
Abstract: Proper decoupling is required for the DS1077 and DS1085 EconOscillators to optimize the frequency stability of the devices. The article discusses power-supply decoupling, AC output load characteristics, and divider configurations, all of which affect frequency accuracy. If these characteristics are known and taken into consideration, these devices can be configured for optimum frequency stability. The article provides an overview of the required decoupling of the devices.
Introduction
Laboratory testing has determined the configurations of the DS1077 and DS1085 EconOscillators that optimize the frequency stability of devices. In summary, power-supply decoupling, AC output load characteristics, and divider configurations all affect frequency accuracy. If these characteristics are known and taken into consideration, these devices can be configured for optimum frequency stability.
In less extreme cases where these factors are not taken consideration, frequency shifts of 0.5% or more could be encountered. In extreme cases, the combination of excessive supply inductance and output load can react with internal oscillator circuits, in some cases causing the devices to exhibit bistable operating frequencies. The following considerations eliminate the possibilities of these occurrences. These design considerations are not limited to EconOscillators, but any device that uses the same type of architecture. These devices include the DS1100(L) 5-tap delay lines, the DS1135(L) 3-in-1 delay lines, and the DS1110, 10-in-1 delay lines.
Design considerations are as follows:
Place 0.1µF and 0.01µF surface-mount, ceramic caps across VCC/GND as close to the package as possible to reduce the detrimental effects of power-supply inductance.
Minimize loading of used output ports; board layout should maintain a minimum trace length between the oscillator and the circuitry it is driving. Capacitive loading should be minimized.
Bypass any unused prescalers or dividers internal to the devices.
If only one output is used, disable the second output, even if it is not connected into the circuit.
Select the lowest master oscillator frequency for the application that will generate the desired frequency.
If multiple prescaler/divider combinations can be used to generate the same frequency, use the combination that maximizes the prescaler value.
High-output loads can be countered with a small inline resistance using the maximum value resistance value, which does not effect output bandwidth.
Data sheet links, application notes, and online frequency calculators to aid in determining the optimal configurations are available online at www.maxim-ic.com.
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