10ポートLVPECL to LVDSリピータ、90psp-p以下の追加確定的ジッタ及び1psp-p以下の追加ランダムジッタを保証
SUNNYVALE, CA-December 4, 2001-Maxim Integrated Products introduces the newest member of the Maxim LVDS family—the MAX9154 10-port, LVPECL-to-LVDS repeater. The MAX9154 accepts a single LVPECL input and repeats the signal at 10 low-jitter, 100Ω drive LVDS outputs. Jitter, the deviation from the ideal timing of an event, increases bit errors and degrades the performance of high-speed communications systems that incorporate phase-locked loops (PLLs), serializers, and deserializers. The MAX9154 minimizes added deterministic jitter to 90psp-p (max), and added random jitter to 1psp-p (max), making it ideal for data and clock distribution in these jitter-sensitive systems. The MAX9154 is ideal for next-generation communications equipment, such as add/drop muxes, digital cross-connects, DSLAMs, and network switches/routers that are migrating to LVDS clock and data distribution, but are still using some legacy devices with LVPECL I/Os.
For clock distribution applications, the MAX9154 guarantees less than 60ps output-to-output skew, ensuring phase alignment between distributed clock signals. In LVDS backplane applications, the MAX9154 enables point-to-point links between cards for more robust live insertion versus buses. In LVDS broadcast topologies, where a single signal is transmitted over point-to-point links to multiple destinations, the MAX9154 saves space and cost by eliminating nine redundant line drivers or serializers.
The MAX9154 conforms to the EIA/TIA-644 standard, ensuring the low-power and low-noise benefits of LVDS. Supply current is reduced to 20µA (max) in low-power shutdown mode. The MAX9154 operates from a single +3.3V supply, is specified over the extended operating temperature range (-40°C to +85°C), and is available in a 28-pin TSSOP package. Prices start at $11.90 (1000-up, FOB USA).
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